1. Field of the Invention
The present invention relates to a data transfer controlling device for controlling a data transfer process between at least a communication device and a memory device, and an IC card for carrying out said data transfer process.
2. Description of the Related Art
An IC card generally includes a memory device, such as a RAM (random access memory) or a flash memory, a communication device for communicating with an external device, and a CPU (central processing unit) for controlling an operation of each of the devices mounted in the IC card.
In general, software processes in a CPU have a slower rate of processing than hardware processes for the same level of power consumption, and the power consumption increases when the frequency for operation is set higher in order to increase the rate of processing. Therefore, some IC cards used for specific applications, such as electronic tickets for trains, where a high-speed data transfer process and operation with low power consumption are required, are provided with an LSI (DMA controller) dedicated to making a data transfer process between at least a memory device and a communication device implementable through hardware without a CPU intervening, in order to achieve reduction in the processing time.
Here, FIG. 8 shows an example of a conventional IC card provided with a DMA controller. As shown in FIG. 8, an IC card 100 includes a CPU 10 for controlling the operation of the respective devices mounted in the IC card 100, a communication device 40 for non-contact type data communication with an external device, such as an IC card reader, a memory device 30 which can store reception data received by the communication device 40 from an external device, and transmission data transmitted to an external device by the communication device 40, and a DMA controller 110 for controlling the data transfer process between the memory device 30 and the communication device 40. Furthermore, the IC card 100 is provided with an address bus 50 for transmitting various types of control signals, such as address signals and read/write signals, and a data bus 60 for transmitting data signals, such as reception data and transmission data, and the CPU 10 and the DMA controller 110 output various types of control signals to the memory device 30 and the communication device 40 via the address bus 50, so that the data transfer process between the memory device 30 and the communication device 40 is controlled.
A technology for achieving a higher rate of data transfer processing and a reduction in the power consumption in an IC card having a DMA controller provides, for example, an IC card configured so that the number of process clocks per unit hour in the data transfer process is variable, and the number of process clocks is in accordance with the state of operation of the LSI, that is to say, the state in the case where a high-speed process is desired to be carried out or in the case where the power consumption is desired to be lowered (see for example Japanese Unexamined Patent Publication 2007-193745).
In the IC card described in Japanese Unexamined Patent Publication 2007-193745, the DMA controller (memory utility portion) sets the number of process clocks in the CPU so that a parity code for the data is generated in parallel with the data transfer process between the memory device and the communication device at the time of the data transfer process from the communication device to an external device. That is to say, a parity code is generated in parallel with the data transfer process on the DMA controller side instead of in the CPU, and thus, the time for generating a parity code is shorter.
In recent years, however, use of IC cards has been increasing, and it has become a goal to lower power consumption, particularly for IC cards in train tickets, and thus, a technology for increasing the speed of processing without increasing the power consumption has become required.
As a result of an increase in the speed of processing of the CPU in recent years, regarding the difference in the frequency for operation between a communication device for data communication with an external device and a CPU, it has become a goal to increase the speed and lower the power consumption in the data transfer process between a communication device and a memory device for storing transmission data and reception data in data communication.